Board Module EVALXCV-HQ240 for Xilinx FPGA Virtex XCV50 to XCV800
Note: This board module is obsolete. It has been replaced with
Board Module EVALXCV-HQ240
The board module EVALXCV-HQ240 is equipped with a member (XCV50 to XCV800)
of the Xilinx Virtex FPGA family in the HQ-240 package. This board is especially
suited to test digital circuits during the early stages of their development.
The high count of system gates enables the user to implement circuits which
reach the complexity of ASICs. The configuration data of the FPGA is downloadable
using one of four modes (master serial mode (XChecker), slave serial mode
(SPROM), boundary scan mode (JTAG) and SelectMAP mode).
Download: Master Serial Mode (SPROM with socket), Slave Serial Mode (XChecker
header connector), Boundary Scan Mode (JTAG header connector), SelectMAP
Mode (header connector)
I/O bank reference voltages: Two adjustable VREFs for 8 I/O banks (selectable
via jumpers) or eight external voltages (e.g. from power module PWR3)
- Voltage supervisor with reset button
- Two separate quarz oscillators with sockets ( DIL8 or DIL14)
Two header connectors (two rows with 50 pins each) for I/Os, clocks and
Two header connectors (one row with 50 pins each) for supply and reference
voltages from power module
- Jumpers to select between internal and external clock sources
- Four ground clips
- Two user buttons
- Eight position DIP switch
- Display with eight LEDs
- "Done" LED
- Power LEDs
- Mode jumpers M0 / M1 / M2
- Daisy chain configuration with other board modules possible
- Several boards may be connected to form a stack
- Board size 100mm x 150mm
Block diagram of the board module
Click on the image to get a larger view.
All 98 general I/Os of the largest (XCV800) FPGA are routed to header
connectors. Additional pins, which are general I/Os on the smaller FPGAs
(XCV600 downto XCV50) and reference voltage pins on the XCV800, may be
accessed on the header connectors by setting some jumpers appropriately.
By stacking several boards, the user may implement circuits whose complexity
is beyond the scope of a single FPGA. The whole stack is configureable
with a single download by means of an external daisy chain.
Four clock sources can be used where two of them are either an onboard
quarz oscillator or an external source. The other two sources are always
external sources. The quarz oscillators are mounted in sockets and can
therefore be exchanged easily. Both, a DIL-8 and a DIL-14 package can be
used. There is the possibility to terminate all clock traces near the FPGA
with resistors to ground. These resistor may be mounted by the user on
the bottom side of the PCB.
An eight position DIP switch is available for user specific applications.
In addition, there are three push buttons. One of them is intended primarily
for use as a reset button. The other two buttons are available for arbitrary
A row with eight LEDs may function as a display for status and error
Power Module PWR3
Block diagram of the power module
Click on the image to get a larger view.
Input power supply range 6-14V
Switching regulator for VCCINT (1.8V/2.5V/3.3V/5V/Uvar)
Switching regulator for VCCO (1.5V/2.5V/3.3V/5V/Uvar)
Switching regulator for VCCOPT (1.8V/2.5V/3.3V/5V/Uvar)
Output voltages with jumper selectable
Uvar is user adjustable in the range 1.3-5.2V
Switching regulators are protected against short circuits and thermal overload
- Max. 4A load current for all output voltages
All output voltages are available on header connectors and on additional
- Output power sufficient for up to three board modules
6 reference voltages (0.75V, 0.8V, 1V, 1.125V, 1.32V and 1.5V) for 8 I/O
banks selectable with DIP switch matrix
- May be stacked with EVALXCV
- Board size 86mm x 150mm
The power module PWR3 generates three regulated output voltages and eight
reference voltages from a single unregulated power supply. The input supply
voltage can be in the range from 6V to 14V. An inverse diode and a transient
suppressor diode in conjunction with a fuse protect the module from inverted
supply voltages and voltage transients.
The output voltages are generated with switching regulators working
with 500kHz operating frequency and having an output current capability
of 4A. They are thermally and short circuit protected. All output voltages
are configureable with jumpers. Four settings (5V, 3.3V, 2.5V and 1.8V
resp. 1.5V) are fix, a fifth setting is adjustable with a trim potentiometer.
The three output voltages are available on header and power connectors.
Each of the eight reference voltages may be selected with DIP switches
among six fixed voltages (0.75V, 0.8V, 1.0V, 1.125V, 1.32V and 1.5V). The
reference voltages are also routed to the header connectors, buffered with
a source follower.
Four LEDs show the state of the three output voltages and the power